Embodiments of the present invention relate generally to transferring data over a data bus in computer systems, and more particularly to modifying the rate at which data is transferred over a computer system data bus.
The past few decades have seen an explosive increase in the performance capability of computer systems. The integrated circuits that give computers their computational power operate at ever increasing data rates. Some circuits, particularly graphics processors made by NVIDIA Corporation of Santa Clara, Calif., have become vastly more complex and orders of magnitude faster. Other circuits, such as central processing units, have become more complex and faster as well.
This increase in graphics processor power has long since out-stripped the ability of an advanced graphics port (AGP) bus to supply the data it needs. This bottleneck formed by the AGP bus has necessitated the use of ever-larger graphics memories that are apart from the system memory and dedicated to the graphics processor. This has been instrumental in leading to the development of an enhanced version of the peripheral component interconnect standard, referred to as PCIE.
But PCIE has its limitations and it is desirable to increase its data rate even further. NVIDIA Corporation is already a pioneer in developing PCIE technologies. Now what is needed are circuits, methods, and apparatus for modifying or increasing the rate at which data is transferred over a PCIE bus.